RT7243GQW Evaluation Board

Purpose

The RT7243 is a synchronous step-down converter with current mode control, which can deliver up to 6A output current from a wide input voltage range of 4.5V to 18V. This document explains the function and use of the RT7243 evaluation board (EVB) and provides information to enable operation and modification of the evaluation board and circuit to suit individual requirements.

Introduction

General Product Information

The RT7243 is a high efficiency, monolithic synchronous step-down DC/DC converter that can deliver up to 6A output current from a 4.5V to 18V input supply. The RT7243 current-mode architecture with external compensation allows the transient response to be optimized over a wide range of loads and output capacitors. Cycle-by-cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during startup. Fault condition protections include output under-voltage protection, output over-voltage protection, and over temperature protection. The low current shutdown mode provides output disconnection, enabling easy power management in battery-powered systems. The RT7243 is available in WQFN-14AL 3.5x3.5 package.

Product Feature

Key Performance Summary Table

Bench Test Setup Conditions

Headers Description and Placement

Please carefully inspect the EVB IC and external components, comparing them to the following Bill of Materials, to ensure that all components are installed and undamaged. If any components are missing or damaged during transportation, please contact the distributor or send e-mail to evb_service@richtek.com

Test Points

The EVB is provided with the test points and pin names listed in the table below..

Power-up & Measurement Procedure

1.Connect input power (4.5V < V_IN < 18V) and input ground to VIN and GND test pins respectively.

2.Connect positive end and negative terminals of load to VOUT and GND test pins respectively.

3.There is a 3-pin header “EN” for enable control. To use a jumper at “H” option to tie EN test pin to input power VIN for enabling the device. Inversely, to use a jumper at “L” option to tie EN test pin and ground GND for disabling the device.

4.The PVIN and VIN pins can be connected together using a jumper across “Combine” by the 3-pin header JP2. Inversely, these two input rails can be separated by using a jumper across “Separate” if desired.

5.The 2-pin header JP1 “VIN-PG” is for PGOOD pin supply, when using a jumper across this header, the PG signal can be supplied by VIN pin Voltage.

6.Verify the output voltage (approximately 1.0V) between VOUT and GND.

7.Connect an external load up to 6A to the VOUT and GND terminals and verify the output voltage and current.

Output Voltage Setting

Set the output voltage with the resistive divider (R1, R2) between VOUT and GND with the midpoint connected to FB. The output is set by the following formula:

The installed VOUT capacitors (C5, C6) are 22μF, 16V X5R ceramic types. Do not exceed their operating voltage range and consider their voltage coefficient (capacitance vs. bias voltage) and ensure that the capacitance is sufficient to maintain stability and provide sufficient transient response for your application. This can be verified by checking the output transient response as described in the RT7243 IC datasheet.

Schematic, Bill of Materials & Board Layout

EVB Schematic Diagram

C4: 10μF/50V/X5R, 1206, TDK C3216X5R1H106K

C2, C5, C6: 22μF/16V/X5R, 1210, Murata GRM32ER61C226K

L1: 1.4μH TAIYO YUDEN NR8040T1R4N, DCR=7mΩ

Bill of Materials

EVB Layout

Top View (1^stlayer)

Bottom View (4^th Layer)

Component Placement Guide—Component Side (1^stlayer)

PCB Layout—Component Side (1^stLayer)

PCB Layout—Bottom Side (4^th layer)